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rev. 1.2 7/2011 page 1 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet bcm? bus converter sw1 enable / disable switch f1 v in pc tm -out +out -in +in l o a d bcm tm bus converter features ? 48 vdc ? 12 vdc 300 w bus converter ? high efficiency (>96%) reduces system power consumption ? high power density (>1022 w/in 3 ) reduces power system footprint by >40% ? contains built-in protection features: - undervoltage - overvoltage lockout - overcurrent protection - short circuit protection - overtemperature protection ? provides enable/disable control, internal temperature monitoring ? can be paralleled to create multi-kw arrays typical applications ? high end computing systems ? automated test equipment ? high density power supplies ? communications systems description the v ? i chip? bus converter is a high efficiency (>96%) sine amplitude converter? (sac?) operating from a 38 to 55 vdc primary bus to deliver an isolated, unregulated 9.5 to 13.8 output. the sine amplitude converter offers a low ac impedance beyond the bandwidth of most downstream regulators; therefore capacitance normally at the load can be located at the input to the sine amplitude converter. since the transformation ratio of the bcm48bf120t300a00 is 1/4, the capacitance value can be reduced by a factor of 16x, resulting in savings of board area, materials and total system cost. the bcm48bf120t300a00 is provided in a v ? i chip package compatible with standard pick-and-place and surface mount assembly processes. the co-molded v ? i chip package provides enhanced thermal management due to a large thermal interface area and superior thermal conductivity. the high conversion efficiency of the bcm48bf120t300a00 increases overall system efficiency and lowers operating costs compared to conventional approaches. typical application c us ? s nrtl c us part number package style product grade f = j-lead t = -40 to 125c t = through hole m = -55 to 125c part numbering for storage and operating temperatures see section 6.0 general characteristics 120 x y 300a00 b 48 bcm
rev. 1.2 7/2011 page 2 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet attribute symbol conditions / notes min typ max unit powertrain input voltage range, continuous v in _ dc 38 55 v input voltage range, transient v in _ trans full current or power supported, 50 ms max, 38 55 v 10% duty cycle max quiescent current i q disabled, pc low 0.5 1.0 ma v in to v out time t on 1 v in = 48 v, pc floating 340 450 620 ms no load power dissipation p nl v in = 48 v, t c = 25oc 5.3 6.5 w v in = 48 v 315 v in = 38 v to 55 v, t c = 25oc 9 v in = 38 v to 55 v 17 inrush current peak i inr _ p worse case of: v in = 55 v, c out = 1000 f, 10 20 a r load = 391 m dc input current i in _ dc at p out = 300 w 8.8 a transformation ratio k k = v out /v in , at no load 1/4 v/v output power (average) p out _ avg 300 w output power (peak) p out _ pk 10 ms max, p out _ avg 300 w 350 w output current (average) i out _ avg 30 a output current (peak) i out _ pk 10 ms max, i out _ avg 30 a 37.5 a v in = 48 v, i out = 25 a; t c = 25c 95.0 96.0 efficiency (ambient) amb v in = 38 v to 55 v, i out = 25 a; t c = 25c 93.5 % v in = 48 v, i out = 13 a; t c = 25c 94.5 95.5 efficiency (hot) hot v in = 48 v, i out = 25 a; t c = 100c 94.5 95.6 % efficiency (over load range) 20% 5 a < i out < 25 a 80 % r out _ cold i out = 25 a, t c = -40c 4.9 6.7 9.0 m output resistance r out _ amb i out = 25 a, t c = 25c 6.3 9.0 13.4 m r out _ hot i out = 25 a, t c = 100c 8.8 11.5 14.0 m switching frequency f sw 1.85 1.95 2.05 mhz output voltage ripple v out _ pp c out = 0 f, i out = 25 a, v in = 48 v, 150 285 mv 20 mhz bw, section 10 output inductance (parasitic) l out _ par frequency up to 30 mhz, 600 ph simulated j-lead model output capacitance (internal) c out _ int effective value at 12 v out 47 f output capacitance (external) c out _ ext 0 1000 f 1.0 absolute maximum voltage ratings the absolute maximum ratings below are stress ratings only. operation at or beyond these maximum ratings can cause permanent damage to the device. 2.0 electrical characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40c < t c < 100c (t-grade) ; all other specifications are at t c = 25oc unless otherwise noted. min max unit +in to ?in . . . . . . . . . . . . . . . . . . . . . . . -1 60 v vin slew rate (operational) . . . . . . . . . -1 1 v/ s isolation voltage, input to output . . . . 2250 v +out to ?out . . . . . . . . . . . . . . . . . . . -1 16 v output current transient (< = 10 ms, < = 10% dc) . . . . . . . . . . . . -3 37.5 a min max unit output current average . . . . . . . . . . . . -2 30 a pc to ?in . . . . . . . . . . . . . . . . . . . . . . . . -0.3 20 v tm to ?in . . . . . . . . . . . . . . . . . . . . . . . -0.3 7 v operating ic junction temperature . . -40 125 c storage temperature . . . . . . . . . . . . . . -40 125 c
rev. 1.2 7/2011 page 3 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 2.0 electrical characteristics (cont.) attribute symbol conditions / notes min typ max unit protection input overvoltage lockout threshold v in _ ovlo + 55.1 58.5 60.0 v input overvoltage recovery threshold v in _ ovlo - 55.1 58.0 60.0 v input overvoltage lockout hysteresis v in _ ovlo _ hyst 1.2 v overvoltage lockout response time t ovlo 8s fault recovery time t auto _ restart 240 300 380 ms input undervoltage lockout threshold v in _ uvlo - 28.5 31.1 37.4 v input undervoltage recovery threshold v in _ uvlo + 28.5 33.7 37.4 v input undervoltage lockout hysteresis v in _ uvlo _ hyst 1.6 v undervoltage lockout response time t uvlo 8s output overcurrent trip threshold i ocp 30 39 55 a output overcurrent response time constant t ocp effective internal rc filter 5.3 ms short circuit protection trip threshold i scp 30 a short circuit protection response time t scp 1s thermal shutdown threshold t j _ otp 125 oc safe operating area average & peak output voltage (v) output power (w) p (ave) p (pk), < 10 ms i (ave) i (pk), < 10 ms output current (a) 200 225 250 275 300 325 350 375 8.70 9.23 9.76 10.29 10.82 11.36 11.89 12.42 12.95 13.48 14.01 6.25 12.50 18.75 25.00 31.25 37.50 43.75 50.00 figure 1 ? safe operating area
rev. 1.2 7/2011 page 4 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 3.0 signal characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40 c < t c < 100c (t-grade) ; all other specifications are at t c = 25c unless otherwise noted. signal type state attribute symbol conditions / notes min typ max unit regular pc voltage v pc 4.7 5.0 5.3 v operation pc available current i pc _ op 2.0 3.5 5.0 ma analog standby pc source (current) i pc _ en 50 100 a output pc resistance (internal) r pc _ int internal pull down resistor 50 150 400 k transition pc capacitance (internal) c pc _ int section 7 1000 pf start up pc load resistance r pc _ s to permit regular operation 60 k start up pc time to start t on 1 340 450 620 ms regular pc enable threshold v pc _ en 2.0 2.5 3.0 v operation digital standby pc disable duration t pc _ dis _ t minimum time before attempting re-enable 1 s input / ouput pc threshold hysteresis v pc _ hyster 50 mv transition pc enable to v out time t on2 v in = 48 v for at least t on1 ms 50 100 150 s pc disable to standby time t pc - dis 4 10 s pc fault response time t fr _ pc from fault to pc = 2 v 100 s ? the pc pin enables and disables the bcm. when held low, the bcm is disabled. ? in an array of bcm modules, pc pins should be interconnected to synchronize start up and permit start up into full load conditions. ? pc pin outputs 5 v during normal operation. pc pin internal bias level drops to 2.5 v during fault mode, provided v in remains in the valid range. primary control : pc signal type state attribute symbol conditions / notes min typ max unit tm voltage range v tm 2.12 4.04 v regular tm voltage reference v tm _ amb t j controller = 27c 2.95 3.00 3.05 v analog operation tm available current i tm 100 a output tm gain a tm 10 mv/c tm voltage ripple v tm _ pp c tm = 0 pf, v in = 48 v, i out = 25 a 120 200 mv digital transition tm capacitance (external) c tm _ ext 50 pf output tm fault response time t fr _ tm from fault to tm = 1.5 v 10 s (fault flag) standby tm voltage v tm _ dis 0v tm pull down (internal) r tm _ int internal pull down resistor 25 40 50 k ? the tm pin monitors the internal temperature of the controller ic within an accuracy of 5c. ? can be used as a "power good" flag to verify that the bcm module is operating. ? is used to drive the internal comparator for overtemperature shutdown. temperature monitor : tm reserved for factory use. no connection should be made to this pin. reserved : rsv
rev. 1.2 7/2011 page 5 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 4.0 timing diagram 12 3 4 5 6 v uvlo + pc 5 v 3 v ll ? k a: t on1 b: t ovlo* c: t auto_restart d:t uvlo e: t on2 f: t ocp g: t pcCdis h: t scp** 1: controller start 2: controller turn o 3: pc release 4: pc pulled low 5: pc released on output sc 6: sc removed vout tm 3 v @ 27c 0.4 v v in 3 v 5 v 2.5 v 500ms before retrial v uvlo C a b e h i ssp i out i ocp g f d c v ovlo + v ovlo C v ovlo + nl notes: C timing and signal amplitudes are not to scale C error pulse width is load dependent *min value switching o **from detection of error to power train shutdown c
rev. 1.2 7/2011 page 6 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 5.0 application characteristics the following values, typical of an application environment, are collected at t c = 25oc unless otherwise noted. see associated figures for general trend data. no load power dissipation vs. line input voltage (v) no load power dissipation (w) -40? 25? 100? 4 5 6 7 8 9 10 11 12 38 40 42 44 46 47 49 51 53 55 full load efficiency vs. t case case temperature (c) full load efficiency (%) 38 v 48 v 55 v v : in 94.0 94.5 95.0 95.5 96.0 96.5 -40 -20 0 20 40 60 80 100 efficiency & power dissipation -40c case load current (a) efficiency (%) 38 v 48 v 55 v v : in 38 v 48 v 55 v power dissipation (w) p d 67 72 77 82 87 92 97 0 5 10 15 20 25 0 5 10 15 20 25 30 figure 2 ? no load power dissipation vs. v in figure 3 ? full load efficiency vs. temperature; v in figure 4 ? efficiency and power dissipation at t c = -40c efficiency & power dissipation 25c case load current (a) efficiency (%) 38 v 48 v 55 v v : in 38 v 48 v 55 v power dissipation (w) p d 78 83 88 93 98 0 5 10 15 20 25 0 6 12 18 24 efficiency & power dissipation 100c case load current (a) efficiency (%) 38 v 48 v 55 v v : in 38 v 48 v 55 v power dissipation (w) p d 78 83 88 93 98 0 5 10 15 20 25 0 6 12 18 24 figure 5 ? efficiency and power dissipation at t c = 25c figure 6 ? efficiency and power dissipation at t c = 100c r out vs. t case at v in = 48 v case temperature (c) rout (m) i : out 12.5 a 25 a 4 6 8 10 12 14 -40 -20 0 20 40 60 80 100 figure 7 ? r out vs. temperature
rev. 1.2 7/2011 page 7 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet figure 10 ? start up from application of pc; v in pre-applied c out = 1000 f figure 9 ? full load ripple, 330 f c in ; no external c out . board mounted module, scope setting : 20 mhz analog bw load current (a) ripple (mv pk-pk) 48 v v : in output voltage ripple vs. load 25 45 65 85 105 125 145 0 5 10 15 20 25 figure 8 ? v ripple vs. i out ; no external c out . board mounted module, scope setting : 20 mhz analog bw figure 12 ? 25 a ? 0 a transient response: c in = 330 f, i in measured prior to c in , no external c out figure 11 ? 0 a? 25 a transient response: c in = 330 f, i in measured prior to c in , no external c out
rev. 1.2 7/2011 page 8 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet attribute symbol conditions / notes min typ max unit mechanical length l 32.25 / [1.270] 32.50 / [1.280] 32.75 / [1.289] mm/[in] width w 21.75 / [0.856] 22.00 / [0.866] 22.25 / [0.876] mm/[in] height h 6.48 / [0.255] 6.73 / [0.265] 6.98 / [0.275] mm/[in] volume vol no heat sink 4.81 / [0.294] cm 3 /[in 3 ] weight w 14.5 / [0.512] g/[oz] nickel 0.51 2.03 lead finish palladium 0.02 0.15 m gold 0.003 0.051 thermal bcm48bf120t300a00 (t-grade) -40 125 c operating temperature t j bcm48bf120m300a00 (m-grade) -55 125 c thermal resistance jc isothermal heatsink and 1 c/w isothermal internal pcb thermal capacity 5 ws/c assembly peak compressive force supported by j-lead only 6lbs applied to case (z-axis) 5.41 lbs / in 2 bcm48bf120t300a00 (t-grade) -40 125 c storage temperature t st bcm48bf120m300a00 (m-grade) -65 125 c moisture sensitivity level msl msl 4 esd hbm human body model, 1000 "jedec jesd 22-a114d.01"class 1d esd withstand esd cdm charge device model, 400 v "jedec jesd 22-c101-d" soldering peak temperature during reflow msl 4 245 c c peak time above 217c 60 90 s peak heating rate during reflow 1.5 3 c/s peak cooling rate post reflow 1.5 6 c/s safety working voltage (in ? out) v in _ out 60 v dc isolation voltage (hipot) v hipot 2,250 v dc isolation capacitance c in _ out unpowered unit 2500 3200 3800 pf isolation resistance r in _ out at 500 vdc 10 m mtbf 6.03 mhrs 7.94 mhrs ctuvus agency approvals / standards curus ce mark rohs 6 of 6 6.0 general characteristics specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of -40 oc < t j < 100oc (t-grade) ; all other specifications are at t j = 25c unless otherwise noted. telcordia issue 2 - method i case iii; 25c ground benign, controlled mil-hdbk-217plus parts count - 25c ground benign, stationary, indoors / computer profile
rev. 1.2 7/2011 page 9 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 7.0 using the control signals pc, tm primary control (pc) pin can be used to accomplish the following functions: ? logic enable and disable for module: once t on1 time has been satisfied, a pc voltage greater than vpc_en will cause the module to start. bringing pc lower than vpc_dis will cause the module to enter standby. ? auxiliary voltage source: once enabled in regular operational conditions (no fault), each bcm module pc provides a regulated 5 v, 3.5 ma voltage source. ? synchronized start up: in an array of parallel modules, pc pins should be connected to synchronize start up across units. this permits the maximum load and capacitance to scale by the number of paralleled modules. ? output disable: pc pin can be actively pulled down in order to disable the module. pull down impedance shall be lower than 60 . ? fault detection flag: the pc 5 v voltage source is internally turned off as soon as a fault is detected. ? note that pc can not sink significant current during a fault condition. the pc pin of a faulted module will not cause interconnected pc pins of other modules to be disabled. temperature monitor (tm) pin provides a voltage proportional to the absolute temperature of the converter control ic. it can be used to accomplish the following functions: ? monitor the control ic temperature: the temperature in kelvin is equal to the voltage on the tm pin scaled by 100. (i.e. 3.0 v = 300 k = 27oc). if a heat sink is applied, tm can be used to protect the system thermally. ? fault detection flag: the tm voltage source is internally turned off as soon as a fault is detected. for system monitoring purposes microcontroller interface faults are detected on falling edges of tm signal.
rev. 1.2 7/2011 page 10 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet +vout -vout modulator fast current limit slow current limit vref tm pc temperature dependent voltage source enable -vin 2.5 v 100 ua 5 v, 2 ma min 150 k 40 k 1000 pf 18.5 v 3.1 v primary current sensing temp_vref start up & fault logic one shot delay ton1 wake-up power and logic pc pull-up & source overtemperature protection overcurrent protection adaptive soft start secondary gate drive uvlo ovlo vin vcc v2 vcc synchronous rectification primary stage & resonant tank power transformer q1 q2 q6 primary gate drive q5 c out q3 q4 gate drive supply +vin 0.01 f 1 k lr cr 8.0 bcm48bf120t300a00 block diagram
rev. 1.2 7/2011 page 11 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 9.0 sine amplitude converter? point of load conversion the sine amplitude converter (sac?) uses a high frequency resonant tank to move energy from input to output. (the resonant tank is formed by cr and leakage inductance lr in the power transformer windings as shown in the bcm? module block diagram. see section 8). the resonant lc tank, operated at high frequency, is amplitude modulated as a function of input voltage and output current. a small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. the bcm48bf120t300a00 sac can be simplified into the preceeding model. at no load: v out = v in ? k (1) k represents the ?turns ratio? of the sac. rearranging eq (1): k= v out (2) v in in the presence of load, v out is represented by: v out = v in ? k ? i out ? r out (3) and i out is represented by: i out = i in ?i q (4) k r out represents the impedance of the sac, and is a function of the r dson of the input and output mosfets and the winding resistance of the power transformer. i q represents the quiescent current of the sac control, gate drive circuitry, and core losses. the use of dc voltage transformation provides additional interesting attributes. assuming that r out = 0 and i q = 0 a, eq. (3) now becomes eq. (1) and is essentially load independent, resistor r is now placed in series with v in . the relationship between v in and v out becomes: v out = (v in ?i in ? r) ? k (5) substituting the simplified version of eq. (4) (i q is assumed = 0 a) into eq. (5) yields: v out = v in ? k ? i out ? r ? k 2 (6) + + v out c out v in v?i k + C + C c in i out r c out i q r out r c in l in = 5 nh 109 ma 1/4 ? i out 1/4 ? v in 9.0 m r cin 0.57 m 973 ph 3.13 r cout 430 47 f l out = 600 ph 2f i q l in = 5.7 nh i out r out v in v out r sac k = 1/32 vin vout + ? v in v out r sac? k = 1/4 figure 14 ? k = 1/4 sine amplitude converter? with series input resistor figure 13 ? v ? i chip tm module ac model c out c in
rev. 1.2 7/2011 page 12 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet this is similar in form to eq. (3), where r out is used to represent the characteristic impedance of the sac?. however, in this case a real r on the input side of the sac is effectively scaled by k 2 with respect to the output. assuming that r = 1 , the effective r as seen from the secondary side is 62.5 m ,withk=1/4. a similar exercise should be performed with the additon of a capacitor or shunt impedance at the input to the sac. a switch in series with v in is added to the circuit. this is depicted in figure 15. a change in v in with the switch closed would result in a change in capacitor current according to the following equation: i c (t) = c dv in (7) dt assume that with the capacitor charged to v in , the switch is opened and the capacitor is discharged through the idealized sac. in this case, i c =i out ? k (8) substituting eq. (1) and (8) into eq. (7) reveals: i out = c ? dv out (9) k 2 dt the equation in terms of the output has yielded a k 2 scaling factor for c, specified in the denominator of the equation. a k factor less than unity results in an effectively larger capacitance on the output when expressed in terms of the input. with a k = 1/4 as shown in figure 15, c = 1 f would appear as c = 16 f when viewed from the output. low impedance is a key requirement for powering a high- current, low-voltage load efficiently. a switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. the use of a sac between the regulation stage and the point of load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its k factor squared. however, the benefits are not useful if the series impedance of the sac is too high. the impedance of the sac must be low, i.e. well beyond the crossover frequency of the system. a solution for keeping the impedance of the sac low involves switching at a high frequency. this enables small magnetic components because magnetizing currents remain low. small magnetics mean small path lengths for turns. use of low loss core material at high frequencies also reduces core losses. the two main terms of power loss in the bcm? module are: - no load power dissipation (p nl ): defined as the power used to power up the module with an enabled powertrain at no load. - resistive loss (r out ): refers to the power loss across the bcm module modeled as pure resistive impedance. p dissipated = p nl + p r out (10) therefore, p out = p in ?p dissipated = p in ?p nl ?p r out (11) the above relations can be combined to calculate the overall module efficiency: = p out = p in ?p nl ?p r out (12) p in p in = v in ? i in ?p nl ?(i out ) 2 ? r out v in ? i in =1 ? ( p nl + (i out ) 2 ? r out ) v in ? i in c s sac k = 1/32 vin vout + ? v in v out c sac? k = 1/4 figure 15 ? sine amplitude converter? with input capacitor s
rev. 1.2 7/2011 page 13 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet 10.0 input and output filter design a major advantage of sac? systems versus conventional pwm converters is that the transformers do not require large functional filters. the resonant lc tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. a small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieve power density. this paradigm shift requires system design to carefully evaluate external filters in order to: 1. guarantee low source impedance: to take full advantage of the bcm? module?s dynamic response, the impedance presented to its input terminals must be low from dc to approximately 5 mhz. the connection of the bus converter module to its power source should be implemented with minimal distribution inductance. if the interconnect inductance exceeds 100 nh, the input should be bypassed with a rc damper to retain low source impedance and stable operation. with an interconnect inductance of 200 nh, the rc damper may be as high as 1 f in series with 0.3 . a single electrolytic or equivalent low-q capacitor may be used in place of the series rc bypass. 2. further reduce input and/or output voltage ripple without sacrificing dynamic response: given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. anomalies in the response of the source will appear at the output of the module multiplied by its k factor. this is illustrated in figures 11 and 12. 3. protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures: the module input/output voltage ranges shall not be exceeded. an internal overvoltage lockout function prevents operation outside of the normal operating input range. even during this condition, the powertrain is exposed to the applied voltage and power mosfets must withstand it. a criterion for protection is the maximum amount of energy that the input or output switches can tolerate if avalanched. total load capacitance at the output of the bcm module shall not exceed the specified maximum. owing to the wide bandwidth and low output impedance of the module, low-frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the input of the module. at frequencies <500 khz the module appears as an impedance of r out between the source and load. within this frequency range, capacitance at the input appears as effective capacitance on the output per the relationship defined in eq. 5. c out = c in eq. 6 k 2 this enables a reduction in the size and number of capacitors used in a typical system. 11.0 thermal considerations v ? i chip? products are multi-chip modules whose temperature distribution varies greatly for each part number as well as with the input / output conditions, thermal management and environmental conditions. maintaining the top of the bcm48bf120t300a00 case to less than 100oc will keep all junctions within the v ? i chip module below 125oc for most applications. the percent of total heat dissipated through the top surface versus through the j-lead is entirely dependent on the particular mechanical and thermal environment. the heat dissipated through the top surface is typically 60%. the heat dissipated through the j-lead onto the pcb surface is typically 40%. use 100% top surface dissipation when designing for a conservative cooling solution. it is not recommended to use a v ? i chip module for an extended period of time at full load without proper heat sinking.
rev. 1.2 7/2011 page 14 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet bcm1 r 0_1 z in_eq1 z out_eq1 z out_eq2 vout z out_eqn z in_eq2 z in_eqn r 0_2 r 0_n bcm2 bcmn load dc vin + figure 16 ? bcm? module array 12.0 current sharing the performance of the sac? topology is based on efficient transfer of energy through a transformer without the need of closed loop control. for this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coefficient series resistance. this type of characteristic is close to the impedance characteristic of a dc power distribution system both in dynamic (ac) behavior and for steady state (dc) operation. when multiple bcm? modules of a given part number are connected in an array they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. some general recommendations to achieve matched array impedances include: ? dedicate common copper planes within the pcb to deliver and return the current to the modules. ? provide as symmetric a pcb layout as possible among modules ? apply same input / output filters (if present) to each unit. for further details see an:016 using bcm? bus converters in high power arrays . 13.0 fuse selection in order to provide flexibility in configuring power systems v ? i chip? modules are not internally fused. input line fusing of v ? i chip products is recommended at system level to provide thermal protection in case of catastrophic failure. the fuse shall be selected by closely matching system requirements with the following characteristics: ? current rating (usually greater than maximum current of bcm module) ? maximum voltage rating (usually greater than the maximum possible input voltage) ? ambient temperature ? nominal melting i 2 t ? recommend fuse: <= 10a littlefuse nano 2 fuse. 14.0 reverse operation bcm modules are capable of reverse power operation. once the unit is started, energy will be transferred from secondary back to the primary whenever the secondary voltage exceeds vin ? k. the module will continue operation in this fashion for as long as no faults occur. the bcm48bf120t300a00 has not been qualified for continuous operation in a reverse power condition. furthermore fault protections which help protect the module in forward operation will not fully protect the module in reverse operation. transient operation in reverse is expected in cases where there is significant energy storage on the output and transient voltages appear on the input. transient reverse power operation of less than 10 ms, 10% duty cycle is permitted and has been qualified to cover these cases.
rev. 1.2 7/2011 page 15 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet inch mm notes: 1. dimensions are . 2. unless otherwise specified, tolerances are: .x / [.xx] = +/-0.25 / [.01]; .xx / [.xxx] = +/-0.13 / [.005] 3. product marking on top surface dxf and pdf files are available on vicorpower.com inch mm notes: 1. dimensions are . 2. unless otherwise specified, tolerances are: .x / [.xx] = +/-0.25 / [.01]; .xx / [.xxx] = +/-0.13 / [.005] 3. product marking on top surface dxf and pdf files are available on vicorpower.com 15.2 j-lead package recommended land pattern mm (inch) 15.1 j-lead package mechanical drawing click here to view original mechanical drawings on the vicor website.
rev. 1.2 7/2011 page 16 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet top view ( component side ) bottom view notes: 1. dimensions are 2. unless otherwise specified tolerances are: x.x [x.xx] = ?.25 [0.01]; x.xx [x.xxx] = ?.13 [0.005] 3. rohs compliant per cst-0001 latest revision dxf and pdf files are available on vicorpower.com inch (mm) . notes: 1. dimensions are 2. unless otherwise specified tolerances are: x.x [x.xx] = ?.25 [0.01]; x.xx [x.xxx] = ?.13 [0.005] 3. rohs compliant per cst-0001 latest revision dxf and pdf files are available on vicorpower.com inch (mm) . recommended hole pattern ( component side shown ) 15.4 through-hole package recommended land pattern mm (inch) 15.3 through-hole package mechanical drawing click here to view original mechanical drawings on the vicor website.
rev. 1.2 7/2011 page 17 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet notes: 1. maintain 3.50 (0.138) dia. keep-out zone free of copper, all pcb layers. 2. (a) minimum recommended pitch is 39.50 (1.555). this provides 7.00 (0.275) component edge-to-edge spacing, and 0.50 (0.020) clearance between vicor heat sinks. (b) minimum recommended pitch is 41.00 (1.614). this provides 8.50 (0.334) component edge-to-edge spacing, and 2.00 (0.079) clearance between vicor heat sinks. 3. v?i chip tm module land pattern shown for reference only; actual land pattern may differ. dimensions from edges of land pattern to pushCpin holes will be the same for all full-size v?i chip products. 4. rohs compliant per cstC0001 latest revision. (no grounding clips) (with grounding clips) 5. unless otherwise specified: dimensions are mm (inches) tolerances are: x.x (x.xx) = 0.3 (0.01) x.xx (x.xxx) = 0.13 (0.005) 6. plated through holes for grounding clips (33855) shown for reference, heat sink orientation and device pitch will dictate final grounding solution. 15.5 recommended heat sink push pin location -in pc rsv tm +in -out +out -out +out bottom view a b c d e f g h j k l m n p r t 4 3 2 1 a b c d e h j k l m n p r t 15.6 bcm tm module pin configuration click here to view original mechanical drawings on the vicor website. signal name designation +in a1-e1, a2-e2 ?in l1-t1, l2-t2 tm h1, h2 rsv j1, j2 pc k1, k2 +out a3-d3, a4-d4, j3-m3, j4-m4 ?out e3-h3, e4-h4, n3-t3, n4-t4
rev. 1.2 7/2011 page 18 of 18 v?i chip corp. (a vicor company) 25 frontage rd. andover, ma 01810 800-735-6200 vicorpower.com x 120 300a00 y b 48 bcm preliminary datasheet vicor?s comprehensive line of power solutions includes high density ac-dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. all sales are subject to vicor?s terms and conditions of sale, which are available upon request. specifications are subject to change without notice. intellectual property notice vicor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications) relating to the products described in this data sheet. interested parties should contact vicor's intellectual property department. the products described on this data sheet are protected by the following u.s. patents numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; d496,906; d505,114; d506,438; d509,472; and for use under 6,975,098 and 6,984,965. vicor corporation 25 frontage road andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 email customer service: custserv@vicorpower.com technical support: apps@vicorpower.com warranty vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. this warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. vicor shall not be liable for collateral or consequential damage. this warranty is extended to the original purchaser only. except for the foregoing express warranty, vicor makes no warranty, express or implied, including, but not limited to, the warranty of merchantability or fitness for a particular purpose. vicor will repair or replace defective products in accordance with its own best judgement. for service under this warranty, the buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior authorization will be returned to the buyer. the buyer will pay all charges incurred in returning the product to the factory. vicor will pay all reshipment charges if the product was defective within the terms of this warranty. information published by vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. per vicor terms and conditions of sale, the user of vicor components in life support applications assumes all risks of such use and indemnifies vicor against all damages.

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